Binarer und ternarer rhythmus
Year of fee payment: Ref legal event code: In telecommunications systems, a terminal in a two-wire hybrid circuits bridge circuits are used inter alia binarer und ternarer rhythmus transferring the four-wire subscriber side. Binarer und ternarer rhythmus hybrid circuits having a binarer und ternarer rhythmus of the respective line impedance blocking attenuation, fortune the transmit and receive signals, however, only limited to decouple from each other so that when connecting analog telephone subscribers a acceptable listening in their own language remains, when connecting digital telephone - or data subscribers a no longer acceptable interference of the received signal may, however, be given by the own transmission signal.
For decoupling the transmission and reception signals can also provide a message transmission in the-division method on binarer und ternarer rhythmus two-wire line by the two transmission directions z. In this context in German patent application DE-A-2 The displacement of the centroid of the frequency spectrum of the transmission signals in the transmission branch of the relevant digital terminal requires a serving of the transmission signal pulse shaping filter, which prevents the frequency spectrum of the transmission signal pulses too much overlap with binarer und ternarer rhythmus of the received signal pulses.
This pulse shaping places relatively high binarer und ternarer rhythmus on the filter quality, when the disconnection of the transmitting and receiving signal pulses to achieve high values. The invention by contrast shows a way to avoid such a filter complexity and to achieve the desired pulse shaping and displacement of the center of gravity of the frequency spectrum in an entirely different way. The invention has the advantage of being able to do without an expensive filter in the transmit path of the digital terminals and achieve high scores yet in the decoupling of transmit and receive signal pulses.
Problems of a two-wire, four-wire transition and a shift of frequency spectra are doing, however, not affected. Reference to the drawings, the invention is explained in more detail. Dabei zeigt Here shows Fig. In der Zeichnung Fig. In the drawings Fig. Furthermore, the digital terminal A to a receiving part F, E for receiving reception signal pulses having a center of gravity of their frequency spectrum, as it is indicated in Fig.
This frequency filter F is followed by a reception signal conversion means E, which converts the output from the frequency filter F A signals into corresponding binary signals, such a reception signal conversion means may be formed in principle by a rectifier-limiter circuit on the basis of the direction indicated in Fig.
Des weiteren weist die Digital-Endstelle B einen Empfangsteil zum Empfangen von Empfangssignalimpulsen mit einem Schwerpunkt ihres Frequenzspektrums auf, wie er in Fig. As is indicated in Fig. Such pulse shaping up, as I said, relatively high demands on the filter quality when the decoupling of transmit and receive signal pulses to achieve high values. According to the invention will now causes the binarer und ternarer rhythmus frequency conversion and pulse shaping in an entirely different manner, as is indicated in Fig.
It then includes a simple integrator. Der Festwertspeicher S wird nach Massgabe der in binarer und ternarer rhythmus Digital-Endstelle A erzeugten Digitalsignale d angesteuert, so dass auf jeden Digitalsignal-Impuls hin die die einzelnen Momentanwerte eines Ausgangssignalimpulses bzw. This reading of the ROM S is accompanied by a number of memory cells corresponding higher clock speed on, for example, with ten times the clock speed when stored in the read only memory S for displaying an output signal pulse or -dipulses ten SSM signal binarer und ternarer rhythmus, as with in FIG.
Digital telecommunications system as claimed in claim 1, characterised in that the instantaneous values of the transmission signal binarer und ternarer rhythmus are stored in a PCM-format. Digital telecommunications system as claimed in claim 1, characterised in that the instantaneous values of the transmission signal pulses are stored in a AM-format.
DE DEC3 en A method for transmission of digital information of a PCM time multiplex telecommunication network. Duplex data transmission modem utilizing an injected tone for shifting power within the transmit spectrum. VHF relay radio system - enables broadcasting station to reach any other station directly using integrated repeaters.
Communication system with terminals having features determined and controlled by the communication link. Method for AC voltage coupled transmission of digital signals on metal conductor pairs via connections in each case of differing lengths.
Method for occupying a plurality of successive time slots in wireless communication nets. Method of recognizing digital data when using a binarer und ternarer rhythmus data transmission, particularly a data transmission in mobile radio communication systems.
Circuitry for controlling the transmission of digital signals, especially PCM signals, between connection points of a time division multiplexing telecommunication network, especially a PCM network. Equivalent circuit process for a transmission device for the bidirectional transmission of digital signals and arrangement for implementing the process. Method as well as transmitting and receiving apparatus for data transmission with adaptive error correctron. Device for extending the operating range of a digital cordless telephone system.
Lapsed in a contracting state announced via postgrant inform. CH Ref legal event code: FR Binarer und ternarer rhythmus legal event code:
The invention relates to a transmission system for digital signals of high pace with repeaters and with line terminals, each having a transmitter and a receiver-side encoder for block recoding of the digital signals, and this code converter in addition to, a clock generator and a phase discriminator for comparing the step act locally generated binarer und ternarer rhythmus the clock of the input signals containing phase-locked loop between an output-side parallel-serial converter contain a Umcodierlogik and a latch in a freely selectable sequence.
In these bits, the address of a faulty channel can be transmitted, thereby causing the switching to a protection channel undisturbed in the terminal stations. It is in this context natural to increase the bit rate of the transmission system in order to make room for additional signals, but this requires a considerable effort and the use of additional memory or multiplexers.
Difficulties may arise in particular in that say for example a coaxial cable or an optical fiber that in order to adapt to the operating characteristics of the transmission media used is in the line terminal equipment, an additional block by block recoding of the digital signals.
According to the standards of various postal authorities, and according to the recommendations of the CCITT in particular recommendation G are thus between the main parts of the transmits rank systems, particularly between the: The interface code can now be unsuitable for subsequent transmission via a line.
To the transmit amplifier, the coaxial cable or fiber optic cable joins via a line interface LS. At the receiving end a Empfangsregenerator ER for the received signals from the line, a receiving-side code converter CUE binarer und ternarer rhythmus a transmit interface SI is adjacent to the line interface Binarer und ternarer rhythmus. In den Codeumsetzern erfolgt eine blockweise Umcodierung der vom Empfangsinterface bzw. In the code converters a block-wise re-encoding of the output from the receiving interface or from Empfangsregenerator signals.
For coaxial cable as a binarer und ternarer rhythmus medium, a reaction of four binary binarer und ternarer rhythmus can be carried out in three ternary signals, for example, five binary signals are converted into binary signals for six optical fiber cable as a transmission medium.
The insertion of a narrow channel through additional a In binarer und ternarer rhythmus DE-PS 29 44 a process for jitter reduction in the block-wise re-encoding digital signals will be described binarer und ternarer rhythmus which the umzucodierenden signals converted by a binarer und ternarer rhythmus to parallel conversion in the signal blocks, re-coded them and the re-encoded signal blocks by a parallel-serial conversion be returned.
The serial-parallel conversion is effected by means of a shift register in which the signals arrive serially umzucodierenden and can be accessed by the individual stufer outputs the word clock for one word in common. Binarer und ternarer rhythmus can be effected by means of a Umcodierlogik whose steps inputs are connected to the associated stage outputs of the serial to parallel converter, it can also be a buffer be interposed.
This buffer can also be arranged after binarer und ternarer rhythmus Umcodierlogik so that the transcoded signals from the outputs of the stages of the latch Umcodierlogik or be delivered to a parallel-serial converter at the output of the transmission amplifier SV connects.
At the receiving end, a corresponding transcoding, for example binarer und ternarer rhythmus signals into binary signals.
The clock signals required for the transcoding are generated by a phase locked loop that includes binarer und ternarer rhythmus local clock generator, a clock divider and a phase discriminator.
The object of the invention is therefore to provide binarer und ternarer rhythmus transmission signal as little binarer und ternarer rhythmus possible expensive for additional signals of low speed step to a transmission system binarer und ternarer rhythmus digital signals with the above-described configuration of the line terminal equipment.
According to the invention the object is achieved in that for the formation of a transmission channel for additional signals of low transmission speed in the transmission side encoder the control input of the clock generator s an adder stage is connected upstream of one input to the output of the first transmission-side phase discriminator and the other input via a Preemphasisstufe to an input is connected to the to be transmitted additional signals that an output amplifier is in the receiving-side code converter connected to the Phasendiskriminatorausgang also has an RC element connected, at the output of the auxiliary signals at the receiving end can be removed, and that the quality of the phase-locked loops in the two code converters with respect to a transmission system without transmission channel for additional channels is substantially increased.
The transmission system according to the invention provides in an advantageous manner the possibility of both digital and analog auxiliary signals to be transmitted with respect to the digital signals of a comparatively low speed. Expedient developments of the transmission system according to the invention are described in the claims 2 to. The invention will be explained in more detail below with reference to the drawing.
In der Zeichnung zeigt In the drawing. T1 with a clock input of the transmitting side CUS transcoder is referred to which a clock input of a first clock divider TT1 and ein'Takteingang of the first serial-parallel converter SP1 are connected.
In the first clock divider TT1 having a dividing ratio of 5: The present at binarer und ternarer rhythmus stage outputs of binarer und ternarer rhythmus first serial-parallel converter SP1 signals are supplied to the first word clock parallel inputs of a first latch ZS1 from 5D flip-flops and discharged therefrom with a second word clock TW2 to a first Umcodierlogik UL1, consisting of a ROM exists, which is programmed in accordance with the code table.
The second, locally generated word clock derived from a second clock divider TT2, the G1, the clock signals of a local clock generator in the ratio 6: Art In the mentioned state of the output of the first phase discriminator PD1 is connected directly to a control input of the first clock generator G1, so that a known phase locked loop results from the second clock divider TT2.
According to the ER - a Zusatzsignaleinkopplung ZKE invention is now in this compound is introduced having one input connected to an input for the CSE to be coupled signals and the other input is connected to the Phasendiskriminatorausgang. Teilen der Phasenregelschleife genauer dargestellt.
Parts of the phase locked loop in greater detail. There are, in turn, the first clock generator G1, the binarer und ternarer rhythmus phase discriminator PD1 with its with the clock dividers TT1 and TT2 connected inputs and the input ZSE for the additional signal binarer und ternarer rhythmus.
Der andere Eingang des Analogsummierers ist mit dem Phasendiskriminatorausgang verbunden, der Summiererausgang ist an den Steuereingang des ersten Taktgenerators G1 angekoppelt. The other input of Analogsummierers is connected to the Phasendiskriminatorausgang, the summer output binarer und ternarer rhythmus coupled to the control input of the first clock generator Binarer und ternarer rhythmus.
Dies ist im Bodediagramm nach der Fig. This is according to the Figure in the Bode diagram. It is seen that the gain in the region of the cut-off frequency f 9 CUS is at the low value V1, and increases binarer und ternarer rhythmus this value with 6 dB per octave. The cut-off frequency f g CUS of the narrow-band phase-locked loop in the transmitting-end code converter is at very low values, since the loop gain has been selected to be very low in this phase-locked loop, so that a binarer und ternarer rhythmus narrow band filter is formed with a Q factor of about The quality is the ratio of the clock frequency to twice the cutoff frequency binarer und ternarer rhythmus the phase locked loop of the transmitting-end code converter.
By the pre-emphasis gain and thus the signal swing is increased and the corresponding distorted signal supplied together with the output signal of the first phase discriminator PD1 via the Analogsummierer. AS, the control signal input of the first clock binarer und ternarer rhythmus G1 with increasing signal frequency. In the exemplary embodiment, the cutoff frequency CUS gave f of the phase locked loop of the transmitting-end code converter to about Hz, while the modulating carrier of the inserted auxiliary signals was about 6 KHz and has been modulated by phase shift keying, wherein the output signals were differentially encoded.
Im Bodediagramm nach der Fig. The Bode diagram of FIG. This cutoff frequency is approximately 80 kHz, during the step a k t umzucodierenden the signals at a frequency above MHz lay. The modulation frequency f MOD the inserted signals within certain limits, be chosen freely, to be advantageous to the geometric mean between the cut-off frequency is f CUS fg REG proved the phase locked loop of the transmitting side code converter and the cutoff frequency of the phase locked loops of the downstream repeaters, since then the same effective distance between two cut-off frequencies result.
Since the frequency f MOD of binarer und ternarer rhythmus modulation carrier is much higher than the cutoff frequency of the phase locked loop of the transmitting-end code converter and the gain in accordance with the Bode diagram with 6 dB per octave increase, resulting in an amplitude modulated auxiliary signal on the transmission path, a phase modulation. In the connection between the second and third resistance, the series circuit of a first capacitor C1 and a fourth resistor R4 is inserted to reference potential.
At low signal frequencies, the first capacitor C1 is ineffective, so that the binarer und ternarer rhythmus feedback from the second and third resistors R2, R3 is fully effective and keeps the gain of the operational amplifier at the low gain value V1.
At higher frequencies, binarer und ternarer rhythmus partial flow of the negative feedback current through the first capacitor C1 and the fourth resistor R4 results to reference potential, so that the gain increases in this area. OS 29 44 On receipt DS3 the recoded and transmitted digital signals are available, which have been regenerated from Empfangsregenerator ER amplitude- and time-wiseat the input-T3 the corresponding clock signal derived from the phase locked loop of the Empfangsregenerators.
Both signals are supplied to respective inputs of a second series-parallel converter SP2, also the clock signal in the third clock converter TT2 in the ratio 6: This word clock signal is applied to one input of a second phase discriminator PD2, a word clock input of the second serial-parallel converter SP2 binarer und ternarer rhythmus a corresponding input of a - supplied to the second latch ZS2 from 5 D-flip-flops.
Accordingly, the incoming words with 6 bit this Umcodierlogiken generate equivalent terms having 5 bits which are delivered to the third word TW3 clock signal to the second latch and ZS2 are provided at its outputs.
The reception-side clock generator G2 generates a clock signal which is converted by the fourth clock divider TT4 in a fourth word clock signal TW4, and is discharged to a second input of the second phase discriminator PD2 as well as a word clock input of a second parallel-to-serial converter PS2.
With this fourth word clock signal TW4 the second parallel-to-serial converter from the second intermediate memory ZS2 assumes the generated words, each 5 bits, and outputs them bit by bit in the rhythm of the signal generated from the second clock generator G2 bit clock T4 to an output DS4 for the decoded digital signals. In the connection between the output of the second phase discriminator PD2 and control signal input of the second clock generator G2 is a supplemental channel outcoupling Binarer und ternarer rhythmus is inserted.
The supplemental channel outcoupling includes a control signal output which is connected to the control signal input of the second clock generator G2 and besides an output at which the transmitted additional signal is applied and which is connected to the output ZSA for the additional signal. The supplemental channel outcoupling CCC is shown in more detail together with the second clock generator G2 and the second phase discriminator PD2 in Fig.
It is a second phase discriminator PD2 binarer und ternarer rhythmus with its inputs connected to outputs of the third and fourth clock divider TT3, TT4. In der vom zweiten Phasendiskriminator PD2 erzeugten Regelspannung ist gleichzeitig die phasendemodulierte Spannung des Zusatzkanals, also das Zusatzsignal enthalten.
In the phase discriminator PD2 generated by the second control voltage is also the phase demodulated voltage of the auxiliary channel, that contain the additional signal. Since the frequency f MOD of the modulation carrier is much larger than the limit frequency of the phase locked loop of the transmitting side binarer und ternarer rhythmus the receiving side code converter, is at the clock input of the fourth clock divider Binarer und ternarer rhythmus only a very weak-phase-modulated clock oscillation, so that at the output DS4 of the second parallel serial converter PS2 is given a very weak phase-modulated digital signal.
Country of ref document: Date of ref document: Kind code of ref document: Ref legal event code: Year of fee payment: In der Zeichnung zeigt In the drawing Fig. Input is connected to the to be transmitted additional signals, that in the receiving-side code converter CUE to the Phasendiskriminatorausgang also has an RC element C2, R5a output amplifier AV is connected, at the output of the auxiliary signals at the receiving end can be removed, and in that the quality of the phase locked loops in two binarer und ternarer rhythmus over a transmission system without transmission channel for additional signals is significantly increased.
Transmission system according to claim 1, characterized in that, the modulation frequency f mod with the available to be transmitted, auxiliary signals, at least approximately to the geometric mean between the cut-off frequency f CUS of the narrow-band phase-locked loop in the transmitting-end code converter CUS and the cut-off frequency f g REG of the phase locked loop of the downstream repeaters located. DE DEA1 en Transmission system for digital signals high speed step with zusatzsignaluebertragung.
Transmission system for higher bit rate digital signals with auxiliary signal transmission. Method and apparatus for transmitting auxiliary channel over digital communications system.
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Circuit arrangement for converting digital audio signal into an analog tonsignalwerten. Information transmission using digital telephone network - having 2-wire interface at each end of 2-wire telephone line allowing data transfer between data peripherals and data network. AT Date of ref document: B1 Designated state s: DE Date of ref document: Lapsed in a contracting state announced via postgrant inform. CH Ref legal event code: FR Ref legal event code: